Würzburg computer chip in space

03/03/2026

Computer science students at the University of Würzburg have developed a processor that has now successfully completed its first functional test in Earth orbit. A SpaceX rocket transported it into orbit for this purpose.

This is what it looks like: The computer chip developed by students at the University of Würzburg. (Image: Technische Informatik / JMU)

On 28 November 2025, a SpaceX Falcon 9 rocket was launched from Vandenberg Space Force Base in California. On board was the HUNITY satellite - a development of the Budapest University of Technology and Economics (BME). It wasn't just scientists in Hungary who were tensely watching the launch; a team of researchers and students from Julius-Maximilians-Universität Würzburg (JMU) must also have been nervously biting their nails.

The reason for this: "The satellite's payload is a RISC-V CPU developed by students," explains Matthias Jung, Professor of Computer Science specialising in Computer Engineering at JMU, who supported the students in their project. In this case, the abbreviation RISC stands for "Reduced Instruction Set Computer".

"Put simply, it's a processor that doesn't try to master thousands of complicated tasks, but concentrates on a very small set of simple basic instructions," explains Jung. The special thing about RISC-V is that this instruction set is open source and therefore does not incur any licence fees.

Use under extreme conditions

After the SpaceX rocket reached its target orbit, the Würzburg processor architecture was activated for the first time on 11 January 2026. With success: at an altitude of 527 kilometres and an orbital speed of around 7.6 kilometres per second, the system worked flawlessly - proof of the resilience of the design under extreme physical conditions. After all, the hardware in this environment is not only exposed to massive temperature fluctuations, but also to increased cosmic radiation.

"The successful execution of a test programme confirms the logical resilience of the architecture under real space conditions," explains Jonathan Hager, a student in Jung's working group. According to him, this proof marks the transition from theoretical designs in the classroom to operational hardware in orbit.

Democratisation of the hardware

The project was made possible by Matt Venn's "TinyTapeout" initiative, which fundamentally simplifies access to semiconductor production. A so-called tapeout is comparable to sending a digital blueprint to a print shop, which produces the physical hardware on this basis. The special feature: All the tools for creating the construction plan are available as free open source software.

For JMU researchers and students, this approach to 130-nanometre-CMOS-production technology opens up new opportunities to realise their own designs without the usual industrial hurdles. This makes it possible to make chip design physically tangible and validate it cost-effectively while still studying.

The Würzburg chip is based on the RISC-V instruction set - the vocabulary used to instruct the hardware. During development, the focus was on reducing complexity by concentrating on just a few core instructions. "The deliberate restriction to just a few instructions in TinyRV1, which was specified by Cornell University, minimises the susceptibility to errors on the hardware side, as a smaller number of switching elements reduces the probability of radiation-related logic errors and allows more space for redundancies," says Matthias Jung. The next step will be to expand the design, which has now been evaluated as suitable for space travel, for use in future missions.